Reliable Domain?Specific Exclusive Logic Gates Using Reconfigurable Sequential Logic Based on Antiparallel Bipolar Memristors

The development of memristor-based stateful logic circuits can minimize data movement during the computing process to achieve in-memory computing, mitigating von Neumann bottleneck in current architecture. Herein, a method combine resistance–resistance (R–R) and voltage–resistance (V–R) gates implement exclusive composed APMR-two-2(XOR, IMP, RIMP) APMR-three-4XOR, where APMR means antiparallel memristors with series resistor, is suggested. proposed accelerate XOR operation single cycle expand for n-bit input. performance gate then demonstrated 1-bit full adder–subtractor along comparison an ripple carry adder. It shows that implementation adder takes 4n+1 within 2n+1 steps, which significantly improves optimization terms space- time-related costs compared other memristive gates. Subsequently, improved circuit be further utilized multiplier. In addition, evaluation device stress on various confirms are reliable.